National Repository of Grey Literature 24 records found  1 - 10nextend  jump to record: Search took 0.01 seconds. 
Design of Communication Protocol for Generic Simulators of Microprocessors
Moskovčák, Jiří ; Kolář, Dušan (referee) ; Masařík, Karel (advisor)
This work concerns about designing of communication protocol for generic processor simulator. The main objective of this work was to design a communication protocol which allows to simulate multiprocessor system on a cluster of computers.
Optimizing Linker
Novosád, Adrián ; Trmač, Miloslav (referee) ; Hruška, Tomáš (advisor)
Project Lissom is developing environment for design application specific processors or SoC(System on Chip). Developing of software for these processors are based on using standard libraries offered by programming languages. Main problem of these libraries is in their extensiveness, because programmers often use only a small part of functions contained in included libraries. This may cause that even a tiny looking program needs large storage space and the program will not fit in the system memory. This work is about implementation of link-time optimizer, which inserts into output program only needed function from libraries. This code-size reduction is based on technique called unreachable code elimination.
Syntax-Directed Editor
Šuška, Boris ; Masařík, Karel (referee) ; Kolář, Dušan (advisor)
This thesis is dealing with integration of available lexical analyzer generator tools and presents concept of parallel syntax analysis based on block-oriented syntax analysis. Results will be used during development of syntax-directed editor under Eclipse platform latter.
Automatic Tool-Chain Testing System
Aschenbrenner, Vojtěch ; Šuška, Boris (referee) ; Hruška, Tomáš (advisor)
Project Lissom is developing environment for design application specific processors or SoC (System on Chip). Project developes tools like assembler, disassembler, simulator, C compiler etc. Environment testing is required and It's main reason for this work. The work is about software testing, types of testing and about existing testing systems. The inspiration from existing systems is used for design and implementation Lissom testing system. System is comparing tools outputs with reference files. The system needs Bugzilla client end e-mail sender for complete functionality. These tools were also created.
Profiler for Generic Simulators of Microprocessors
Wilczák, Milan ; Přikryl, Zdeněk (referee) ; Masařík, Karel (advisor)
This thesis presents design and implementation of profiling tool for newly created microprocessors. For microprocessor description specialized language ISAC is used which describes processor resources, instruction set and behavior. Final profiler is an extension to existing simulator and can be used for optimizing of both processor and its applications. Principle of the profiler is generating events by simulator and processing these events into statistics.
Simulation of the 8051 Microprocessor Architecture
Šimon, Petr ; Křoustek, Jakub (referee) ; Hruška, Tomáš (advisor)
More than 90% of processors are used in embedded systems today. Processor design for embedded systems is becoming complicated, so it should be automate as much as possible. This bachelor thesis deals with design of the microcontroller 8051. Design is created according to available documentation and ISAC language is used for model description. Results of model simulations are analyzed at the end of this thesis.
Implementation of General Assembler
Husár, Adam ; Masařík, Karel (referee) ; Hruška, Tomáš (advisor)
This thesis describes the design of the universal assembler that represents a part of the Lissom project. You will be provided with the description of the assembler architectures and their usual tasks. Special attention is paid to GNU assembler. Designed assembler consists of the fixed and the generated part. The generated part is created automatically from the description of instruction set, that is defined using architecture and instructions set description language ISAC. Using this approach, it is possible to change assembler target architecture automatically. The second part of thesis describes the Parserlib2 library implementation that is a part of the Lissom project and provides the information about the target instruction set for an assembler generator.
Retargetable Analysis of Machine Code
Křoustek, Jakub ; Janoušek, Jan (referee) ; Návrat,, Pavol (referee) ; Kolář, Dušan (advisor)
Analýza softwaru je metodologie, jejímž účelem je analyzovat chování daného programu. Jednotlivé metody této analýzy je možné využít i v dalších oborech, jako je zpětné inženýrství, migrace kódu apod. V této práci se zaměříme na analýzu strojového kódu, na zjištění nedostatků existujících metod a na návrh metod nových, které umožní rychlou a přesnou rekonfigurovatelnou analýzu kódu (tj. budou nezávislé na konkrétní cílové platformě). Zkoumány budou dva typy analýz - dynamická (tj. analýza za běhu aplikace) a statická (tj. analýza aplikace bez jejího spuštění). Přínos této práce v rámci dynamické analýzy je realizován jako rekonfigurovatelný ladicí nástroj a dále jako dva typy tzv. rekonfigurovatelného translátovaného simulátoru. Přínos v rámci statické analýzy spočívá v navržení a implementování rekonfigurovatelného zpětného překladače, který slouží pro transformaci strojového kódu zpět do vysokoúrovňové reprezentace. Všechny tyto nástroje jsou založeny na nových metodách navržených autorem této práce. Na základě experimentálních výsledků a ohlasů od uživatelů je možné usuzovat, že tyto nástroje jsou plně srovnatelné s existujícími (komerčními) nástroji a nezřídka dosahují i lepších výsledků.
Processors Library for the Embedded System Design
Zvonček, Radovan ; Husár, Adam (referee) ; Hruška, Tomáš (advisor)
This work deals with designing a library of processor models used in embedded systems. Processor architectures are described using the ISAC language. The ISAC language is one of several outcomes of the Lissom project that is taking place at the Faculty of Information Technology, BUT, Brno. The beginning of this work is aimed to provide the introduction to processor architectures used in today's embedded systems. Remaining sections are devoted to presentations of exemplary processor architectures and the description of their implementation. This work is finalized by concluding the gathered experience with emphasis on the suitability of the ISAC language for architecture description and the efficiency of its simulation.
Syntax-Directed Editor for ISAC Language and for Language of Generic Assembler Implemented as Eclipse Plugin
Šuška, Boris ; Lukáš, Roman (referee) ; Masařík, Karel (advisor)
This thesis is dealing with creation of LR parser from formally described grammar. I was creating a lexical analyzer based on determinictic finite automaton, which is created from regular expressions. These expressions describe lexemes of language generated by grammar. I used created syntax analyzer to construct syntax directed editor using Eclipse platform.

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